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Dr. Simi Zerine Sleeba
Ph.D, M.Tech VLSI & Embedded Systems, B.Tech Electronics & Communication Engineering
Asst Professor

Dr. Simi Zerine Sleeba received her B.Tech in Electronics and Communication Engineering from M.A. College of Engineering, Kothamangalam in 1997 and M.Tech in VLSI & Embedded Systems from Govt. Model Engineering College, Kochi. She holds the second position in the 2008-10 M.Tech VLSI and Embedded System  examination conducted  by CUSAT. She was awarded PhD from Cochin University of Science and Technology in 2018. She joined RSET in January 2020 as Assistant Professor in the Dept. of Electronics & Communication Engineering. Prior to this, she was a faculty member at Viswajyothi College of Engineering and Technology, Muvattupuzha with a teaching & research experience of 15 years.  She has also worked as a software engineer in CMC Ltd., New Delhi and Mission Informatics Pvt. Ltd, Kochi for 3.5 years.  Her main research interests are Multi core computer architecture, Network-on- Chip, Fault tolerant systems, Thermal aware and Approximate arithmetic circuits.

RSET Unique Id: 31910
Email simizs@rajagiritech.edu.in
ORCID_iD 0000-0002-2716-270X
Google Scholar ID https://scholar.google.com/citations?hl=en&authuser=1&user=4gg6TcgAAAAJ
Year Title of the Paper-Conference/Journal Details
2023 Subnetwork Based Traffic Aware Rerouting for CMesh Bufferless Network-on-Chip
Journal of Circuits, Systems and Computers
2021 Interleaved Edge Routing in Buffered 3D Mesh & CMesh NoC
8th International Conference on Smart Computing and Communications
2021 Implementation of Low Complexity Signal Tracking Loop of a GPS Receiver Using CORDIC Algorithm
International Conference on Advances in Computing and Communications (ICACC)
2021 DAReS: Deflection Aware Rerouting between Subnetworks in Bufferless On-Chip Networks
2020 Smart Glove
AICTE sponsored International online Conference on Current Trends and Challenges in Health care Informatics and Technology, KSR College of Engineering, TamilNadu
2020 Traffic aware routing in 3D NoC using interleaved symmetric edge routers
Nano Communication Networks, Elsevier ( SC Indexed)